software/hardware engineer

Posted on: 2008-07-05

CURRICULUM VITAE Name:Manjusha D/O M.ANAND, Email Id: [email protected] D.NO:2-5-2, Phone No: 91-9291404016 Kotipallivari street, Narsapur-534275. W.G.Dist,A.P. CAREER OBJECTIVE: To begin my career as a responsible person in an organization that entrusts me to perform in challenging assignments that would in turn help the organization grow, and the experience of which will enable me to grow professionally and personally. EDUCATION: • B. TECH in Electronics & Communication Engineering (2003- 2007)in SCET(JNTU).Narsapur,AP with an aggregate of 56.37% • INERMEDIATE from Board of Intermediate Education, A.P aggregating 67.50%.from Geethanjali junior college,vijayawada,AP • S.S.C from Board of Secondary Education, A.P.with an aggregate of 70.50% in sunshine school,narsapur,AP TECHNICAL SKILLS: Programming Languages : C,C++,.net Operating System : Windows XP. ACHIEVEMENTS:  Presented a Working model on “ Mobile based Hi-tech Door LockingSystem”in SRUJANA 2006, a State Level project competition organized by Akhil Bharatiya Vidyarthi Parishad.  Participated in college level essay writing competition and won first prize. PERSONAL SKILLS:  Good communication skills and ability to take challenges  Good Leadership qualities, hard working nature and Team Work.  Adaptability to any situation and learning capabilities. PROJECT DETAILS: TITLE: REALISATION OF USART 8251A USING VHDL DESCRIPTION: In the digital transmission application, many dedicated chips are developed in MSI, LSI for transmission and reception of data. The present trend is that of VLSI (Very Large Scale Integration) in which millions of transistors are integrated on a single chip. The USART 8251A (Universal Synchronous and Asynchronous Receiver and Transmitter) operates in Full Duplex mode. Depending upon the control word and mode word, this can be configured as 1.Synchronous Transmitter and Receiver, no parity, even parity or odd parity, character length of 5,6,7 or 8 bits, fixed baud rate, one or two sync characters. 2.Asynchronous Transmitter and Receiver, start bit, no parity, even parity or odd parity, character length of 5,6,7 or 8 bits, variable baud rate, 1 or 1.5 or 2 start bits. This project deals with simulation of USART 8251A, a serial communication interface using one of the most popular languages of VLSI design-VHDL. PERSONAL PROFILE: Nationality : Indian Name : Manjusha Father’s name : M.Anand Mother’s name : M.Gayatri Date of Birth : 21st July1985 Gender : Female Marital Status : single Hobbies : Listening music,gardening. Languages Known : English, Hindi and Telugu. DECLARATION: I hereby declare that the above-mentioned information is correct up to my knowledge and I bear the responsibility for the correctness of the above-mentioned particulars. M.MANJUSHA